Address counter for addressing synchronous high-frequency...

Error detection/correction and fault detection/recovery – Pulse or data error handling – Memory testing

Reexamination Certificate

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C711S200000, C365S236000

Reexamination Certificate

active

06862702

ABSTRACT:
The novel address counter can be used in combination with an existing test unit—serving for testing digital circuits—for addressing synchronous high-frequency digital circuits, in particular fast memory devices. Address offset values are provided in programmable offset registers, with a multiplexer circuit and a selection and combination circuit, on the basis of input signals which are fed in at low frequency and in parallel by the test unit. Simple address changes and address jumps can be realized at a high clock frequency in a very flexible manner.

REFERENCES:
patent: 4779084 (1988-10-01), Tanaka et al.
patent: 5657466 (1997-08-01), Yazawa

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