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System and method for multi-mode multi-state path metric...

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital data error correction
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System and method for network device configuration

Error detection/correction and fault detection/recovery – Pulse or data error handling – Error count or rate
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System and method for network error rate testing

Error detection/correction and fault detection/recovery – Pulse or data error handling – Error count or rate
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System and method for non-causal channel equalization

Error detection/correction and fault detection/recovery – Pulse or data error handling – Data pulse evaluation/bit decision
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System and method for non-causal channel equalization using...

Error detection/correction and fault detection/recovery – Pulse or data error handling – Data pulse evaluation/bit decision
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System and method for on-board timing margin testing of...

Error detection/correction and fault detection/recovery – Pulse or data error handling – Memory testing
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System and method for on-board timing margin testing of...

Error detection/correction and fault detection/recovery – Pulse or data error handling – Memory testing
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System and method for optimized test and configuration...

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing
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System and method for optimized test and configuration...

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing
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System and method for optimizing iterative circuit for...

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital data error correction
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System and method for optimizing iterative circuit for...

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital data error correction
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System and method for parallel processing of data integrity...

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital data error correction
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System and method for parallel testing of IEEE 1149.1...

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing
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System and method for performing a Chien search using...

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital data error correction
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System and method for performing backward error recovery in...

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital data error correction
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System and method for performing class propagation and type chec

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing
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System and method for performing high speed memory...

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing
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System and method for performing improved pseudo-random testing

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing
Patent

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System and method for performing logic failure diagnosis...

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing
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System and method for performing on-chip self-testing

Error detection/correction and fault detection/recovery – Pulse or data error handling – Transmission facility testing
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