System and method for optimizing iterative circuit for...

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital data error correction

Reexamination Certificate

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C714S807000

Reexamination Certificate

active

08051359

ABSTRACT:
A system for generating CRC code words associated with data ranging up to w-bytes in width to be communicated over a communications channel includes a first plurality of serially coupled code-generation blocks each for generating a CRC value based on data input to each block, respective blocks of the first plurality configured for receiving data inputs having respective byte widths ranging from 2N+M to 2N−L+M, where N is equal to log2(w), and M is an offset value, and L is a whole number based on a maximum propagation delay criteria; a second plurality of parallel coupled code-generation blocks each for generating a CRC value based on data inputs, respective blocks of the second plurality configured for receiving data having respective byte widths ranging from 2N−L−1+M to 20; and, a device for selecting particular CRC code generation blocks in the first and second pluralities to be included in a CRC calculation based on the data input; wherein any number of data input bytes may be processed.

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patent: 2002-141809 (2002-05-01), None
patent: WO 02/082664 (2002-10-01), None

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