System and method for multi-mode multi-state path metric...

Details System and method for multi-mode multi-state path metric... System and method for multi-mode multi-state path metric...

2005-12-23

2009-02-24

Chase, Shelly A (Department: 2112)

Error detection/correction and fault detection/recovery

Pulse or data error handling

Digital data error correction

Reexamination Certificate

active

07496827

ABSTRACT:
A wireless communication device comprises a first memory unit operable to store current and next stage memory low data of a path metric calculation of a trellis-based decoding processor, a second memory unit operable to store current and next stage memory high data of the path metric calculation of the trellis-based decoding processor, and wherein the trellis-based decoding processor is operable for multiple decoding constraint lengths and multiple states.

REFERENCES:
patent: 5923713 (1999-07-01), Hatakeyama
patent: 7020214 (2006-03-01), Bickerstaff
patent: 2004/0255230 (2004-12-01), Chen et al.
Author unknown;How to Implement a Viterbi Decoder on the StarCore SC140; “Convolutional Encoding and Viterbi Decoding”; Chapter 2, pp. 3-27.
Turbo Code Project Page; http:// faraday.ee.emu.edu.tr/eaince/ee562/Public/sova.htm; 6 pages; retrieved Oct. 25, 2005.
“Turbo-decoding” of error-correcting codes using belief networks/graphical models; http//www.datalab.uci.edu/projects/turbocode/; 3 pages; retrieved Oct. 25, 2005.
Turbo code; http://en.wikipedia.org/wiki/Turbo—code; 3 pages; retrieved Oct. 25, 2005.
Viterbi algorithm; http//en.wikipedia.org/wiki/Viterbi—algorithm; 4 pages; retrieved Oct. 25, 2005.

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