Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital data error correction
Reexamination Certificate
2005-09-20
2005-09-20
Decady, Albert (Department: 2133)
Error detection/correction and fault detection/recovery
Pulse or data error handling
Digital data error correction
C714S042000, C714S052000, C714S054000, C714S807000, C714S005110, C714S006130, C365S201000
Reexamination Certificate
active
06948112
ABSTRACT:
A system for performing data error recovery includes a memory unit and a memory controller. The memory unit includes a plurality of memory locations, and the memory controller maintains a checksum in one of the memory locations. At various times, the memory controller receives requests to update the checksum with data values identified by the requests. In response, the memory controller combines the checksum with these data values and stores the foregoing data values into memory. In one embodiment, the memory controller stores the foregoing data values into a plurality of stacks based on which protection domains are associated with the data values. In response to a detection of a data error, the memory controller retrieves a plurality of the stored data values and recovers a previous state of a particular memory location by combining each of the retrieved data values to the checksum.
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Hornung Bryan
Shaw Keith W.
De'cady Albert
Gandhi Dipakkumar
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