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Integrated circuit tester with multi-port testing functionality

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing
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Integrated circuit tester with software-scaleable channels

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing
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Integrated circuit testing

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing
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Integrated circuit testing device with dual purpose analog...

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing
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Integrated circuit testing method and system

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing
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Integrated circuit testing module including data compression

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing
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Integrated circuit testing module including signal shaping...

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing
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Integrated circuit testing system and method

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing
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Integrated circuit testing using a high speed data interface...

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing
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Integrated circuit testing using segmented scan chains

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing
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Integrated circuit using wireless communication to store...

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital data error correction
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Integrated circuit with a control input that can be disabled

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing
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Integrated circuit with a VLSI chip control and monitor...

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing
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Integrated circuit with alternately selectable state...

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing
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Integrated circuit with blocking pin to coordinate entry...

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing
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Integrated circuit with design for testability and method...

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing
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Integrated circuit with embedded test functionality

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing
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Integrated circuit with emulation register in JTAG JAP

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing
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Integrated circuit with JTAG port, tap linking module, and...

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing
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Integrated circuit with JTAG port, TAP linking module, and...

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing
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