Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing
Reexamination Certificate
2009-12-18
2010-11-09
Britt, Cynthia (Department: 2117)
Error detection/correction and fault detection/recovery
Pulse or data error handling
Digital logic testing
C714S727000, C714S729000
Reexamination Certificate
active
07831878
ABSTRACT:
An IC includes an IEEE 1149.1 standard test access port (TAP) interface and an additional Off-Chip TAP interface. The Off-Chip TAP interface connects to the TAP of another IC. The Off Chip TAP interface can be selected by a TAP Linking Module on the IC.
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Bassuk Lawrence J.
Brady W. James
Britt Cynthia
Telecky , Jr. Frederick J.
Texas Instruments Incorporated
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