Integrated circuit testing method and system

Details Integrated circuit testing method and system Integrated circuit testing method and system

2005-08-30

2005-08-30

Decady, Albert (Department: 2133)

Error detection/correction and fault detection/recovery

Pulse or data error handling

Digital logic testing

C714S727000, C714S733000, C714S745000, C324S763010

Reexamination Certificate

active

06938194

ABSTRACT:
A system for testing an integrated circuit, the integrated circuit including: flip-flops connected to a logic block and the test system including circuitry for connecting the flip-flops as a register, circuitry for inhibiting the different elements of the logic block capable of disturbing the sequencing of the register or the propagation of the signals into the logic block, and a control circuit for separately controlling the different inhibiting circuits and the circuitry for connecting the flip-flops as a register.

REFERENCES:
patent: 5166604 (1992-11-01), Ahanin et al.
patent: 5285153 (1994-02-01), Ahanin et al.
patent: 5467354 (1995-11-01), Yamauchi
patent: 5574731 (1996-11-01), Qureshi
patent: 6510534 (2003-01-01), Nadeau-Dostie et al.

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