Integrated circuit tester with multi-port testing functionality

Details Integrated circuit tester with multi-port testing functionality Integrated circuit tester with multi-port testing functionality

2005-11-15

2005-11-15

Torres, Joseph D. (Department: 2133)

Error detection/correction and fault detection/recovery

Pulse or data error handling

Digital logic testing

Reexamination Certificate

active

06966018

ABSTRACT:
Automated test equipment (ATE) includes a tester-per-pin architecture with a number of individual decentralized per-pin testing units, wherein each per-pin testing unit is adapted for testing a respective DUT-pin of a device under test (DUT) by emitting stimulus response signals to the respective DUT-pin and/or receiving stimulus response signals from the respective DUT-pin. Testing the DUT includes defining for a testing sequence the DUT into one or more DUT-cores representing one or more functional units of the DUT and covering one or more DUT-pins of the DUT, and assigning during the testing sequence one or more of the per-pin testing units to one or more ATE-ports, whereby each ATE-port comprises one or more of the per-pin testing units and represents an independent functional testing unit for testing one or more of the DUT-cores during the testing sequence.

REFERENCES:
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Cheung et al., “Tester for multiple integrated circuit—produces sequence of test signals and has programmable memory for storing independent sequence”, Copyright 1999 Derwent Information Ltd, Derwent-Week: 200246.

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