Integrated circuit testing system and method

Details Integrated circuit testing system and method Integrated circuit testing system and method

2005-11-08

2005-11-08

Chung, Phung My (Department: 2133)

Error detection/correction and fault detection/recovery

Pulse or data error handling

Digital logic testing

C365S233100, C327S161000

Reexamination Certificate

active

06964003

ABSTRACT:
A system and method for testing the data propagation time in an integrated circuit at relatively low speed is described herein. The method uses at least two parallel circuits comprising a data circuit and a clock circuit, wherein these parallel circuits are provided with at least one inverter for sensing the feeding current of each circuit so as to obtain current pulses that are transformed into binary signals forwarded to a tester that measures the delay time between these signals.

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