Base cell for engineering change order (ECO) implementation
BiMOS integrated circuit
Chip level bias for buffers driving voltages greater than transi
Circuit and method for contact pad isolation
Circuit and method for differentiating multiple modules
Circuit for contact pad isolation
Circuitry for a low internal voltage integrated circuit
Circuits and method for body contacted and backgated...
Clock driver circuit in a centrally located macro cell layout re
Contact ring architecture
Coupling of signals between adjacent functional blocks in an...
Dynamic logic circuit including dynamic standard cell library
Electronic circuit device and hybrid integrated circuit with...
Electronic device
Field programmable gate array utilizing dedicated memory...
Fusible link configuration in integrated circuits
Gate array architecture
Gate array architecture
Gate array architecture and layout for deep space applications
High speed data processing system and method