Electronic digital logic circuitry – Significant integrated structure – layout – or layout...
Reexamination Certificate
1999-05-28
2003-01-28
Le, Don Phu (Department: 2819)
Electronic digital logic circuitry
Significant integrated structure, layout, or layout...
C326S026000, C361S788000
Reexamination Certificate
active
06512396
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates generally to method and apparatus for increasing the speed and number of slots in a data processing system backplane, and more particularly to method, circuit and system for increasing speed and capacity of a data processing system by boosting drive current in computer backplanes.
2. Description of the Related Art
In general, computer backplanes are used for interconnecting circuit boards in a high-speed data processing system. More particularly, computer backplanes are configured with a plurality of connectors for receiving the circuit boards. The connectors are interconnected with terminals, usually pins, and traces to form a bus for carrying signals between the connectors. Here a bus is defined as a collection of similar signals such as 64-bits of data and the term “backplane” is intended to encompass backplanes, motherboards, and even an individual circuit board. Typically, a driver circuit on one circuit board at one connector sends a signal along the bus to be received and decoded by a receiver circuit on another circuit board at another connector.
The ever increasing demand for more computing power and speed, however, has placed a severe load on conventional driver circuits of backplanes. In general, the desired drive current to send a signal can be represented by the formula:
I=C×dV/dT
Accordingly, the desired drive current is proportional to the total net capacitance (“C”), which is the sum of the capacitance of the backplane, the capacitance of all the connectors, the capacitance of all the stubs, and the capacitance of all the drivers and receivers. In a conventional VME (“Versa Module European”) backplane or a Compact PCI (“Peripheral Component Interface”) backplane, such capacitance can readily equal 450 pico-farads or 250 pico-farads, respectively. Additionally, the drive current is proportional to the desired voltage change (“dV”). Typically, in order to send and receive a valid signal, a voltage change of approximately 2.0 volts is desired. The drive current, however, is inversely proportional to the desired rise-time or fall-time (“dT”). In general, the faster the desired data transfer, the faster the desired transition times, and the greater the required drive current. For example, in a 33 megahertz Compact PCI bus, a transition time of approximately 15 nano-seconds is desired, thus a minimum driver current of at least 33 milliamps is required. For a 66 megahertz Compact PCI bus, a minimum driver current of at least 66 milliamps is required. However, a conventional Compact PCI driver typically can provide a maximum of only 8 milliamps. Consequently, conventional Compact PCI busses are limited to 8 slots at 33 megahertz and 4-5 slots at 66 megahertz, which presents a severe system design limitation. PCI-X (a double speed 133 Megahertz proposal advocated by several computer manufacturers) allows only 3 slots. To attempt to overcome the problems of slot limitations, PCI-to-PCI bridges have been proposed. Although such bridges may increase performance by allowing operations on multiple bus segments simultaneously, they introduce other problems. They interfere with data latency and interrupt determinacy, they use up one precious load on each bus segment, and they cannot be hot-swapped (replaced with power on) and they are very difficult to package and service.
Some improvement in backplane performance is achieved in accordance with the teachings of U.S. Pat. No. 5,696,667, the disclosure of which is herein incorporated by reference, but the need still exists for an increase in operating speed and in the number of slots that can be accommodated on a data system backplane.
SUMMARY OF THE INVENTION
In accordance with one embodiment of the present invention, a boost circuit on a computer backplane is configured to supplement the drive current provided by the circuit board driver circuits. More particularly, as a driver begins to drive a signal positive (i.e., from a logic low state to a logic high state), when the signal passes a lower threshold, the boost circuit engages to provide a current larger than the current provided by the driver in order to switch the signal above an upper threshold more quickly. When the signal passes the upper threshold, the boost circuit disengages and the driver suitably maintains the signal at the higher level. Similarly, when the driver starts to drive the signal negative (i.e., from a logic high state to a logic low state), as the signal passes the upper threshold, the boost circuit engages to provide a current larger than the current provided by the driver in order to cause the signal to transition to a level below a lower threshold more quickly. When the signal again passes the lower threshold, the boost circuit disengages and the driver suitably maintains the signal at the lower level.
In accordance with another embodiment of the invention, a boost circuit is provided to supplement the drive current provided by the drivers on a computer backplane and the supplemental current is driven through a damping impedance.
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Arizona Digital, Inc.
Le Don Phu
Snell & Wilmer
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