Field programmable gate array utilizing dedicated memory...

Details Field programmable gate array utilizing dedicated memory... Field programmable gate array utilizing dedicated memory...

2011-03-08

2011-03-08

Tran, Anh Q (Department: 2819)

Electronic digital logic circuitry

Significant integrated structure, layout, or layout...

C326S041000, C326S047000

Reexamination Certificate

active

07902879

ABSTRACT:
A field programmable gate array, an access lead network coupled to the FPGA, and a plurality of memories electrically coupled to the access lead network. The FPGA, access lead network, and plurality of memories are arranged and configured to operate with a variable word width, namely with a word width between 1 and a maximum number of bits. The absolute maximum word width may be as large as m*N where m is the number of word width bits per memory chip and N is the number of memory chips.

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