4. Electronic digital logic circuitry
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Method and apparatus for adaptive chip trim adjustment

Electronic digital logic circuitry – Significant integrated structure – layout – or layout... – Field-effect transistor
Patent

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Method and system for providing an interconnect layout to reduce

Electronic digital logic circuitry – Significant integrated structure – layout – or layout...
Patent

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Method for forming an electric device comprising power...

Electronic digital logic circuitry – Significant integrated structure – layout – or layout...
Reexamination Certificate

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Methods, apparatus, and systems for reducing interference on...

Electronic digital logic circuitry – Significant integrated structure – layout – or layout...
Reexamination Certificate

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Microelectronic integrated circuit including triangular semicond

Electronic digital logic circuitry – Significant integrated structure – layout – or layout...
Patent

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MOS inverter circuit

Electronic digital logic circuitry – Significant integrated structure – layout – or layout... – Field-effect transistor
Patent

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