Multi-addressable register file

Multi-instruction set flag preservation apparatus and method

Multi-level pattern history branch predictor using branch...

Multi-port read/write operations based on register bits set...

Multi-processor system utilizing concurrent speculative...

Multi-processor system utilizing concurrent speculative...

Multi-purpose floating point and integer multiply-add...

Multi-table branch prediction circuit for predicting a...

Multi-threaded data processing management system

Multi-threaded parallel processor methods and apparatus

Multi-threaded processor architecture

Multi-way select instructions using accumulated condition codes

Multifunction hexadecimal instructions

Multimedia-instruction acceleration device for increasing...

Multiple control sequences per row of microcode ROM

Multiple coprocessor architecture to process a plurality of...

Multiple entry points for system call instructions

Multiple execution of instruction loops within a processor...

Multiple global pattern history tables for branch prediction in

Multiple instruction execution mode resource-constrained device