Multi-addressable register file

Details Multi-addressable register file Multi-addressable register file

2011-01-25

2011-01-25

Pan, Daniel (Department: 2183)

Electrical computers and digital processing systems: processing

Processing control

Instruction modification based on condition

C712S003000

Reexamination Certificate

active

07877582

ABSTRACT:
A single register file may be addressed using both scalar and SIMD instructions. That is, subsets of registers within a multi-addressable register file according to the illustrative embodiments, are addressable with different instruction forms, e.g., scalar instructions, SIMD instructions, etc., while the entire set of registers may be addressed with yet another form of instructions, referred to herein as Vector-Scalar Extension (VSX) instructions. The operation set that may be performed on the entire set of registers using the VSX instruction form is substantially similar to that of the operation sets of the subsets of registers. Such an arrangement allows legacy instructions to access subsets of registers within the multi-addressable register file while new instructions, i.e. the VSX instructions, may access the entire range of registers within the multi-addressable register file.

REFERENCES:
patent: 4595911 (1986-06-01), Kregness et al.
patent: 5063497 (1991-11-01), Cutler et al.
patent: 5278945 (1994-01-01), Basehore et al.
patent: 5341320 (1994-08-01), Trissel et al.
patent: 5390307 (1995-02-01), Yoshida
patent: 5450607 (1995-09-01), Kowalczyk et al.
patent: 5487022 (1996-01-01), Simpson et al.
patent: 5560035 (1996-09-01), Garg et al.
patent: 5668984 (1997-09-01), Taborn et al.
patent: 5669013 (1997-09-01), Watanabe et al.
patent: 5675777 (1997-10-01), Glickman
patent: 5685009 (1997-11-01), Blomgren et al.
patent: 5701508 (1997-12-01), Glew et al.
patent: 5751987 (1998-05-01), Mahant-Shetti et al.
patent: 5761103 (1998-06-01), Oakland et al.
patent: 5768169 (1998-06-01), Sharangpani
patent: 5805475 (1998-09-01), Putrino et al.
patent: 5822778 (1998-10-01), Dutton et al.
patent: 5825678 (1998-10-01), Smith
patent: 5978901 (1999-11-01), Luedtke et al.
patent: 5995122 (1999-11-01), Hsieh et al.
patent: 6009511 (1999-12-01), Lynch et al.
patent: 6105129 (2000-08-01), Meier et al.
patent: 6131104 (2000-10-01), Oberman
patent: 6178482 (2001-01-01), Sollars
patent: 6185671 (2001-02-01), Pentovski et al.
patent: 6282554 (2001-08-01), Abdallah et al.
patent: 6292815 (2001-09-01), Abdallah et al.
patent: 6295599 (2001-09-01), Hansen et al.
patent: 6321327 (2001-11-01), Makineni et al.
patent: 6460135 (2002-10-01), Suganuma
patent: 6715061 (2004-03-01), Wang
patent: 6792523 (2004-09-01), Glew et al.
patent: 6839828 (2005-01-01), Gschwind et al.
patent: 6934830 (2005-08-01), Kadambi et al.
patent: 7043627 (2006-05-01), Shimizu et al.
patent: 7149882 (2006-12-01), Glew et al.
patent: 7257695 (2007-08-01), Jiang et al.
patent: 7430656 (2008-09-01), Sperber et al.
patent: 2005/0125630 (2005-06-01), Liao et al.
patent: 2005/0289299 (2005-12-01), Nunamaker et al.
U.S. Appl. No. 12/023,768, filed Jan. 31, 2008, Gschwind et al.
U.S. Appl. No. 12/023,768, Image File Wrapper printed from PAIR on Jun. 11, 2010, 2 pages.
Notice of Allowance mailed Jul. 30, 2010 for U.S. Appl. No. 12/023,768, 7 pages.

Affiliated with

Also associated with

Rating

Multi-addressable register file does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Multi-addressable register file, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Multi-addressable register file will most certainly appreciate the feedback.

Rate now

Comments { 0 }

Profile ID: LFUS-PAI-O-2716026