Facilitating communication within an emulated processing...

Facility to allow fast execution of and, or, and test...

Fast branch misprediction recovery method and system

Fast execution of branch instruction with multiple...

Fast stub and frame technology for virtual machine optimization

Fault recovery on a massively parallel computer system to...

Feedback mechanism for dynamic predication of indirect jumps

Fencing off instruction buffer until re-circulation of...

Fetch branch architecture for reducing branch penalty...

Fetch director employing barrel-incrementer-based...

Filter micro-coded accelerator

Fixed length memory to memory arithmetic and architecture...

Fixed length memory to memory arithmetic and architecture...

Fixed point unit pipeline allowing partial instruction...

Flag optimization of a trace

Flags handling for system call instructions

Floating point and multimedia unit with data type reclassificati

Floating point exception handling in pipelined processor...

Floating point NaN comparison

Floating point only SIMD instruction set architecture...