Handling address translations and exceptions of a...
Handling data cache misses out-of-order for asynchronous...
Handling exceptions in a pipelined data processing apparatus
Handling exceptions occuring during processing of vector...
Handling interrupts during multiple access program instructions
Handling problematic events in a data processing apparatus
Hardware constrained software execution
Hardware device for executing programmable instructions...
Hardware device for parallel processing of any instruction...
Hardware emulator having a selectable write-back processor unit
Hardware looping mechanism and method for efficient...
Hardware loops
Hardware loops
Hardware loops and pipeline system using advanced generation...
Hardware predication for conditional instruction path branching
Hardware predication for conditional instruction path branching
Hardware resource having an optimistic policy and a...
Hardware/software system for instruction profiling and trace...
Hardware/software system for profiling instructions and...
Hashing a target address for a memory access instruction in...