Macroscalar processor architecture

Macroscalar processor architecture

Magnetic disc control apparatus with parallel data transfer...

Managing instruction side-effects

Managing stack transfers in a register-based processor

Managing stack transfers in a register-based processor

Map unit having rapid misprediction recovery

Master-slave latch circuit for multithreaded processing

Maximal tile generation technique and associated methods for...

Means and apparatus for maintaining condition codes in an uneval

Mechanism for avoiding check stops in speculative accesses...

Mechanism for delivering precise exceptions in an...

Mechanism for enabling efficient execution of an instruction

Mechanism for error handling in a computer system

Mechanism for executing computer instructions in parallel

Mechanism for fast access to control space in a pipeline...

Mechanism for floating point to integer conversion with RGB bias

Mechanism for forwarding operands based on predicated instructio

Mechanism for handling failing load check instructions

Mechanism for hardware tracking of return address after tail...