Validating prediction for branches in a cluster via...

Variable cycle instruction execution in variable or maximum...

Variable length instruction pipeline

Variable state save formats based on operand size of state...

Various length software breakpoint in a delay slot

Vector processing system

Vector processing system

Vector technique for addressing helper instruction groups...

Vector/scalar system with vector unit producing scalar...

Versatile branch-less sequence control of instruction stream...

Versatile register file design for a multi-threaded...

Vertically and horizontally threaded processor with...

Virtual computer of plural FPG's successively...

Virtual condition codes

Virtual instruction expansion based on template and...

Virtual instruction expansion using parameter selector...

Virtual register set expanding processor internal storage

Virtual shadow registers and virtual register windows

Virtual shadow registers and virtual register windows

Virtual shadow registers and virtual register windows