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Method and apparatus for implementing two architectures in a...

Electrical computers and digital processing systems: processing – Instruction issuing – Simultaneous issuance of multiple instructions
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Method and apparatus for improving dispersal performance in...

Electrical computers and digital processing systems: processing – Instruction issuing – Simultaneous issuance of multiple instructions
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Method and apparatus for improving dispersal performance in...

Electrical computers and digital processing systems: processing – Instruction issuing – Simultaneous issuance of multiple instructions
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Method and apparatus for increasing load bandwidth

Electrical computers and digital processing systems: processing – Instruction issuing
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Method and apparatus for instruction and data serialization in a

Electrical computers and digital processing systems: processing – Instruction issuing
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Method and apparatus for instruction pointer storage element...

Electrical computers and digital processing systems: processing – Instruction issuing
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Method and apparatus for pipeline streamlining where...

Electrical computers and digital processing systems: processing – Instruction issuing
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Method and apparatus for prioritized instruction issue queue...

Electrical computers and digital processing systems: processing – Instruction issuing
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Method and apparatus for reducing register file access times...

Electrical computers and digital processing systems: processing – Instruction issuing
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Method and apparatus for scheduling instructions in waves

Electrical computers and digital processing systems: processing – Instruction issuing
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Method and apparatus for separate control processing and...

Electrical computers and digital processing systems: processing – Instruction issuing – Simultaneous issuance of multiple instructions
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Method and apparatus for token triggered multithreading

Electrical computers and digital processing systems: processing – Instruction issuing – Simultaneous issuance of multiple instructions
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Method and apparatus for using past history to avoid flush...

Electrical computers and digital processing systems: processing – Instruction issuing – Simultaneous issuance of multiple instructions
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Method and computer system for decomposing macroinstructions...

Electrical computers and digital processing systems: processing – Instruction issuing – Simultaneous issuance of multiple instructions
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Method and system for nonsequential instruction dispatch and...

Electrical computers and digital processing systems: processing – Instruction issuing – Simultaneous issuance of multiple instructions
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Method and system in data processing system of permitting concur

Electrical computers and digital processing systems: processing – Instruction issuing – Simultaneous issuance of multiple instructions
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Method for compacting an instruction queue

Electrical computers and digital processing systems: processing – Instruction issuing – Simultaneous issuance of multiple instructions
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Method for non-intrusive cache fills and handling of load misses

Electrical computers and digital processing systems: processing – Instruction issuing – Simultaneous issuance of multiple instructions
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Method for scheduling a flag generating instruction and a subseq

Electrical computers and digital processing systems: processing – Instruction issuing
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Method for selecting between divide instructions associated...

Electrical computers and digital processing systems: processing – Instruction issuing
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