Method and apparatus for improving dispersal performance in...

Details Method and apparatus for improving dispersal performance in... Method and apparatus for improving dispersal performance in...

2006-12-12

2006-12-12

Treat, William M. (Department: 2181)

Electrical computers and digital processing systems: processing

Instruction issuing

Simultaneous issuance of multiple instructions

Reexamination Certificate

active

07149881

ABSTRACT:
A method and apparatus for improving dispersal performance of instruction threads is described. In one embodiment, the dispersal logic determines whether the instructions supplied to it include any NOP instructions. When a NOP instruction is detected, the dispersal logic places the NOP into a no-op port for execution. All other instructions are distributed to the proper execution pipes in a normal manner. Because the NOP instructions do not use the execution resources of other instructions, all instruction threads can be executed in one cycle.

REFERENCES:
patent: 6195756 (2001-02-01), Hurd
patent: 6442701 (2002-08-01), Hurd
patent: 6564316 (2003-05-01), Perets et al.

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