Method for selecting between divide instructions associated...

Electrical computers and digital processing systems: processing – Instruction issuing

Reexamination Certificate

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Reexamination Certificate

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07941642

ABSTRACT:
In one embodiment, a multithreaded processor includes a multithreaded instruction source that may provide a plurality of instructions each corresponding to a respective one of a plurality of threads. The multithreaded processor also includes a pick unit coupled to the multithreaded instruction source. The pick unit may select in a given cycle, a first divide instruction corresponding to one thread of the plurality of threads and a second divide instruction corresponding to another thread of the plurality of threads based upon a thread selection algorithm. Further, the multithreaded processor includes a storage coupled to a functional unit including a divider configured to execute the first divide instruction and the second divide instruction. The storage may store one of the first and the second divide instructions during execution of the other of the first and the second divide instructions.

REFERENCES:
patent: 5046068 (1991-09-01), Kubo et al.
patent: 5257215 (1993-10-01), Poon
patent: 5339266 (1994-08-01), Hinds et al.
patent: 5386375 (1995-01-01), Smith
patent: 5515308 (1996-05-01), Karp et al.
patent: 5546593 (1996-08-01), Kimura et al.
patent: 5619439 (1997-04-01), Yu et al.
patent: 5954789 (1999-09-01), Yu et al.
patent: 6076157 (2000-06-01), Borkenhagen et al.
patent: 6088788 (2000-07-01), Borkenhagen et al.
patent: 6088800 (2000-07-01), Jones et al.
patent: 6105127 (2000-08-01), Kimura et al.
patent: 6131104 (2000-10-01), Oberman
patent: 6212544 (2001-04-01), Borkenhagen et al.
patent: 6282554 (2001-08-01), Abdallah et al.
patent: 6341347 (2002-01-01), Joy et al.
patent: 6349319 (2002-02-01), Shankar et al.
patent: 6357016 (2002-03-01), Rodgers et al.
patent: 6397239 (2002-05-01), Oberman et al.
patent: 6415308 (2002-07-01), Dhablania et al.
patent: 6427196 (2002-07-01), Adiletta et al.
patent: 6434699 (2002-08-01), Jones et al.
patent: 6496925 (2002-12-01), Rodgers et al.
patent: 6507862 (2003-01-01), Joy et al.
patent: 6523050 (2003-02-01), Dhablania et al.
patent: 6564328 (2003-05-01), Grochowski et al.
patent: 6567839 (2003-05-01), Borkenhagen et al.
patent: 6581155 (2003-06-01), Lohman et al.
patent: 6594681 (2003-07-01), Prabhu
patent: 6625654 (2003-09-01), Wolrich et al.
patent: 6629236 (2003-09-01), Aipperspach et al.
patent: 6629237 (2003-09-01), Wolrich et al.
patent: 6668308 (2003-12-01), Barroso et al.
patent: 6668317 (2003-12-01), Bernstein et al.
patent: 6671827 (2003-12-01), Guilford et al.
patent: 6681345 (2004-01-01), Storino et al.
patent: 6687838 (2004-02-01), Orenstien et al.
patent: 6694347 (2004-02-01), Joy et al.
patent: 6694425 (2004-02-01), Eickemeyer
patent: 6697935 (2004-02-01), Borkenhagen et al.
patent: 6728845 (2004-04-01), Adiletta et al.
patent: 6748556 (2004-06-01), Storino et al.
patent: 6801997 (2004-10-01), Joy et al.
patent: 6820107 (2004-11-01), Kawai et al.
patent: 6847985 (2005-01-01), Gupta et al.
patent: 6857064 (2005-02-01), Smith et al.
patent: 6883107 (2005-04-01), Rodgers et al.
patent: 6889319 (2005-05-01), Rodgers et al.
patent: 6898674 (2005-05-01), Kottapalli et al.
patent: 7213135 (2007-05-01), Burky et al.
patent: 2002/0046324 (2002-04-01), Barroso et al.
patent: 2004/0034759 (2004-02-01), Katzman et al.
patent: 2004/0194094 (2004-09-01), Qiu et al.
patent: 2004/0267855 (2004-12-01), Shantz et al.
patent: 2005/0060517 (2005-03-01), Morrow
Alverson et al., “Tera Hardware-Software Cooperation,” Tera Computer Company, 1997, (16 pages).
Alverson et al., “The Tera Computer System,” Tera Computer Company, Jun. 1990, (6 pages).
Alverson et al., “Exploiting Heterogeneous Parallelism on a Multithreaded Multiprocessor,” Tera Computer System, 1992, (10 pages).
Smith, “The End of Architecture,”17thAnnual Symposium on Computer Architecture, May 29, 1990, (8 pages).
Ungerer et al., “A Survey of Processors with Explicit Multithreading,” ACM Computing Surveys, vol. 34, No. 1, Mar. 2003, (35 pages).
Tulsen et al., “Power-sensitive multithreaded architecture,” IEEE 2000, pp. 199-206.
Uhrig et al., “Hardware-based power management for real-time applications,” Proceedings of the Second International Symposium on Parallel and Distributed Computing, IEEE 2003, 8 pages.
Tullsen, et al., “Simultaneous Multithreading: Maximizing On-Chip Parallelism,” ISCA 1995, pp. 533-544.
Tullsen, et al., “Exploiting Choice: Instruction Fetch and Issue on an Implementable Simultaneous Multithreading Processor,” pp. 191-202.
Uhrig, et al., “Implementing Real-Time Scheduling Within A Multithreaded Java Microcontroller,” 8 pages.
Ide, et al.. “A 320-MFLOPS CMOS Floating-Point Processing Unit for Superscalar Processors,” IEEE 1993, 5 pages.
Nemawarkar, et al., “Latency Tolerance: A Metric for Performance Analysis of Multithreaded Architectures,” IEEE 1997, pp. 227-232.
Baniasadi, et al., “Instruction Flow-Based Front-end Throttling for Power-Aware High-Performance Processors,” ACM 2001, pp. 16-21.
Gura, et al., “An End-to-End Systems Approach to Elliptic Curve Cryptography,” 16 pages.
Eberle, et al., “Cryptographic Processor for Arbitrary Elliptic Curves over GF(2m),” 11 pages.

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