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Method for functional verification of an integrated circuit...

Computer-aided design and analysis of circuits and semiconductor – Integrated circuit design processing – Logic design processing
Reexamination Certificate

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Method for generating optimized constraint systems for...

Computer-aided design and analysis of circuits and semiconductor – Integrated circuit design processing – Logic design processing
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Method for generating pattern, method for manufacturing...

Computer-aided design and analysis of circuits and semiconductor – Integrated circuit design processing – Layout editor
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Method for incorporating pattern dependent effects in...

Computer-aided design and analysis of circuits and semiconductor – Integrated circuit design processing – Testing or evaluating
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Method for laying out decoupling cells and apparatus for...

Computer-aided design and analysis of circuits and semiconductor – Integrated circuit design processing – Physical design processing
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Method for making a design layout and mask

Computer-aided design and analysis of circuits and semiconductor – Integrated circuit design processing – Optimization
Reissue Patent

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Method for manufacturing semiconductor device

Computer-aided design and analysis of circuits and semiconductor – Integrated circuit design processing – Physical design processing
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Method for multi-cycle path and false path clock gating

Computer-aided design and analysis of circuits and semiconductor – Integrated circuit design processing – Logic design processing
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Method for operating a secure semiconductor IP server to...

Computer-aided design and analysis of circuits and semiconductor – Integrated circuit design processing – Testing or evaluating
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Method for performing failure mode and effects analysis of...

Computer-aided design and analysis of circuits and semiconductor – Integrated circuit design processing – Logic design processing
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Method for performing timing analysis of a circuit

Computer-aided design and analysis of circuits and semiconductor – Integrated circuit design processing – Logic design processing
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Method for place and route of multicore chip

Computer-aided design and analysis of circuits and semiconductor – Integrated circuit design processing – Physical design processing
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Method for prioritizing nodes for rerouting and device therefor

Computer-aided design and analysis of circuits and semiconductor – Integrated circuit design processing – Physical design processing
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Method for programming a mask-programmable logic device and...

Computer-aided design and analysis of circuits and semiconductor – Integrated circuit design processing – Physical design processing
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Method for reducing power consumption of integrated circuit

Computer-aided design and analysis of circuits and semiconductor – Integrated circuit design processing – Optimization
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Method for repeated block timing analysis

Computer-aided design and analysis of circuits and semiconductor – Integrated circuit design processing – Physical design processing
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Method for resolving overloads in autorouting physical...

Computer-aided design and analysis of circuits and semiconductor – Integrated circuit design processing – Physical design processing
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Method for resolving overloads in autorouting physical...

Computer-aided design and analysis of circuits and semiconductor – Integrated circuit design processing – Physical design processing
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Method for simplifying tie net modeling for router performance

Computer-aided design and analysis of circuits and semiconductor – Integrated circuit design processing – Physical design processing
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Method for testing integrated circuits

Computer-aided design and analysis of circuits and semiconductor – Integrated circuit design processing – Testing or evaluating
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