Computer-aided design and analysis of circuits and semiconductor – Integrated circuit design processing – Physical design processing
Reexamination Certificate
2011-07-21
2011-12-27
Memula, Suresh (Department: 2825)
Computer-aided design and analysis of circuits and semiconductor
Integrated circuit design processing
Physical design processing
C716S128000, C716S129000, C716S130000, C716S137000
Reexamination Certificate
active
08086987
ABSTRACT:
Overloaded regions in the routing space of a physical network are resolved via a routing procedure composed of a topological routing phase and a geometric routing phase. The overloads are resolved in the topological routing phase where the constraints of routing are less prohibitive. Multiple topological transformations directed toward resolving the overloads are executed in the topological routing phase prior to a geometric arrangement being realized. The topological transformations may be applied concurrently by way of a multi-threaded embodiment of the invention.
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Schilp William
Wadland Ken
Cadence Design Systems Inc.
Memula Suresh
Rosenberg , Klein & Lee
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