Array cell circuit with split read/write line
Array of flash memory cells and data program and erase...
Array of non-volatile memory cells including embedded local...
Array of nonvolatile memory device and method for fabricating th
Array source line (AVSS) controlled high voltage regulation...
Array source line (AVSS) controlled high voltage regulation...
Array structure for assisted-charge memory devices
Array structure of two-transistor cells with merged floating...
Array VSS biasing for NAND array programming reliability
Array-source line, bitline and wordline sequence in flash operat
Ascending staircase read technique for a multilevel cell...
Asymmetric band-gap engineered nonvolatile memory device
Asymmetric band-gap engineered nonvolatile memory device
Asymmetric flash EEPROM with a pocket to focus electron injectio
Asymmetric virtual ground p-channel flash cell with latid n-type
Asymmetrical alternate metal virtual ground EPROM array
Asymmetrical non-volatile memory cell, arrays and methods for fa
Auto adjusting window placement scheme for an NROM virtual...
Auto-program circuit in a nonvolatile semiconductor memory devic
Auto-saving circuit for programming configuration elements in no