Array of nonvolatile memory device and method for fabricating th

Details Array of nonvolatile memory device and method for fabricating th Array of nonvolatile memory device and method for fabricating th

1998-02-27

1999-08-10

Nelms, David

Static information storage and retrieval

Floating gate

Particular biasing

36518514, G11C 1606

Patent

active

059368896

ABSTRACT:
An array of a nonvolatile memory device and a fabricating method thereof has a simple stacked-gate structure without metal contact holes. The array of a nonvolatile memory device includes a plurality of memory cells. Each memory cell includes a floating gate, a control gate, and the source/drain regions. A plurality of word lines are connected to the control gates of the memory in a column direction and spaced apart from one another by a predetermined distance in a row direction. A plurality of bit lines are connected to the source/drain regions perpendicular to the word lines. A plurality of program lines is formed in parallel with the bit lines. A plurality of program gates is connected to the program lines for programming the floating gates adjacent to the program gates.

REFERENCES:
patent: 5355332 (1994-10-01), Endoh et al.
patent: 5386132 (1995-01-01), Wong
patent: 5471422 (1995-11-01), Chang et al.
patent: 5656840 (1997-08-01), Yang
patent: 5781476 (1998-07-01), Seki et al.

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