Large-scale EPROM memory with a high coupling factor
Last-first mode and apparatus for programming of...
Last-first mode and method for programming of non-volatile...
Latch circuit and method for writing and reading volatile...
Latch-type sensing circuit and program-verify circuit
Latched programming of memory and method
Latching sense amplifier for a programmable logic device
Layout for NAND flash memory array having reduced word line...
Layout for NAND flash memory array having reduced word line...
Layout of flash memory and formation method of the same
Layout reduction by sharing a column latch per two bit lines
Layout structure for use in flash memory device
Leaf plot analysis technique for multiple-side operated devices
Leakage detection in flash memory cell
Leakage detection in flash memory cell
Leakage detection in programming algorithm for a flash...
Leakage tolerant sense amplifier
Leakage verification for flash EPROM
Least significant bit page recovery method used in...
Level verification and adjustment for multi-level cell (MLC)...