Array source line (AVSS) controlled high voltage regulation...

Details Array source line (AVSS) controlled high voltage regulation... Array source line (AVSS) controlled high voltage regulation...

2008-01-09

2008-12-02

Phung, Anh (Department: 2824)

Static information storage and retrieval

Floating gate

Particular biasing

C365S185200

Reexamination Certificate

active

07460411

ABSTRACT:
A method for programming a Flash memory array comprises coupling at least one of a current source and a potential source to at least one selected bitline of a Flash memory array, monitoring a potential VAVSSof an array VSS line by means of a comparator, allowing the array VSS line to electrically float until the potential VAVSSis approximately equal to a reference potential Vref, and terminating the programming by de-coupling at least one of the current source and the potential source.

REFERENCES:
patent: 5859796 (1999-01-01), Cleveland
patent: 5933366 (1999-08-01), Yoshikawa
patent: 6222771 (2001-04-01), Tang et al.
patent: 7110298 (2006-09-01), Moogat et al.

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