Array of non-volatile memory cells including embedded local...

Details Array of non-volatile memory cells including embedded local... Array of non-volatile memory cells including embedded local...

2010-12-10

2011-12-06

Elms, Richard (Department: 2824)

Static information storage and retrieval

Floating gate

Particular biasing

C365S185210, C365S185230

Reexamination Certificate

active

08072815

ABSTRACT:
An array of memory cells has a first side adjacent to a first column, a second side opposite the first side, a third side adjacent to a first row, and a fourth side opposite the third side. Each memory cell is connected to a bit line, a high voltage source, and a low voltage source. Reference cells, substantially the same as the memory cells, evenly spaced apart, are embedded in the array. A high voltage decoder is on the first side, connected to the memory cells and reference cells in the same row. A low voltage row decoder is on the second side, connected to the memory cells and reference cells in the same row. Sense amplifiers are on the third side, connected to the memory cells and to the reference cells.

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