Architecture for virtual ground memory arrays

Architecture of a non-volatile electrically erasable and...

Architecture of a nvDRAM array and its sense regime

Architecture to suppress bit-line leakage

Area efficient implementation of small blocks in an SRAM array

Arrangement for storing a count

Array and pitch of non-volatile memory cells

Array architecture and operating methods for digital...

Array architecture and operating methods for digital...

Array architecture and operating methods for digital...

Array architecture and operation methods for a nonvolatile...

Array architecture nonvolatile memory and its operation methods

Array cell circuit with split read/write line

Array of flash memory cells and data program and erase...

Array of non-volatile memory cells including embedded local...

Array of nonvolatile memory device and method for fabricating th

Array source line (AVSS) controlled high voltage regulation...

Array source line (AVSS) controlled high voltage regulation...

Array structure for assisted-charge memory devices

Array structure of two-transistor cells with merged floating...