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Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate

Stacked gate flash memory cell with reduced disturb conditions

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate

Stacked gate flash memory device and method of fabricating...

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate

Stacked gate flash memory device and method of fabricating...

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate

Stacked gate flash memory device and method of fabricating...

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate

Stacked LDD high frequency LDMOSFET

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate

Stacked local interconnect structure and method of...

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate

Stacked mask integration technique for advanced CMOS transistor

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – On insulating substrate or layer

Stacked multi-gate transistor design and method of fabrication

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate

Stacked poly/amorphous silicon gate giving low sheet resistance

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate

Stacked semiconductor integrated circuit device and...

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – On insulating substrate or layer

Stacked transistors and process

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate

Stand-alone triggering structure for ESD protection of high...

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate

Standard cell back bias architecture

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate

Standard cell back bias architecture

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate

Standby current reduction over a process window with a...

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate

Static memory cell and method of manufacturing a static memory c

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate

Static NVRAM with ultra thin tunnel oxides

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate

Static pass transistor logic with transistors with multiple...

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate

Static random access memory design and fabrication process featu