Static random access memory design and fabrication process featu

Details Static random access memory design and fabrication process featu Static random access memory design and fabrication process featu

1998-05-29

1999-12-07

Tsai, Jey

Semiconductor device manufacturing: process

Making field effect device having pair of active regions...

Having insulated gate

438382, 148DIG20, H01L 218244

Patent

active

059982497

ABSTRACT:
A method for forming an SRAM cell, on a semiconductor substrate, comprised of MOSFET devices, and polysilicon load resistors, has been developed. The process for forming the SRAM cell features the use of two, self-aligned contact, (SAC), structures, a polycide SAC structure, used for contact to a source region of a MOSFET pull down transistor, and a tungsten SAC structure, used for contact to a source region of a MOSFET pass gate transistor. A buried contact region is also featured in this SRAM design and fabrication procedure, used to connect underlying active device regions, of MOSFET pull down transistors, and MOSFET pass gate transistors.

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patent: 5763303 (1998-06-01), Liaw et al.
patent: 5770496 (1998-06-01), Roberts

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