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Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate

Reduction of a hot carrier effect phenomena via use of transient

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate

Reduction of channel hot carrier effects in transistor devices

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate

Reduction of dopant diffusion by the co-implantation of impuriti

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate

Reduction of dopant loss in a gate structure

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate

Reduction of field edge thinning in peripheral devices

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate

Reduction of field edge thinning in peripheral devices

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate

Reduction of gate-induced drain leakage in semiconductor devices

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – On insulating substrate or layer

Reduction of induced charge in SOI devices during focused...

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – On insulating substrate or layer

Reduction of masking and doping steps in a method of fabricating

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate

Reduction of memory instability by local adaptation of...

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate

Reduction of negative bias temperature instability using...

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate

Reduction of ONO fence during self-aligned etch to eliminate pol

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate

Reduction of orientation dependent oxidation for vertical...

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate

Reduction of pad erosion

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate

Reduction of poly depletion in semiconductor integrated circuits

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate

Reduction of the aspect ratio of deep contact holes for...

Utility Patent

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate

Reference layer structure in a magnetic storage cell

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate

Regulating resistor network, semiconductor device including...

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – On insulating substrate or layer

Relaxed SiGe layers on Si or silicon-on-insulator substrates...