Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate
Patent
1997-09-30
1999-05-25
Tsai, Jey
Semiconductor device manufacturing: process
Making field effect device having pair of active regions...
Having insulated gate
438692, 438700, H01L 218242
Patent
active
059077719
ABSTRACT:
Improved technique of forming trench capacitors without causing excessive erosion at the edges of the array region resulting from polishing. The erosion is reduced by providing a block mask to protect the array region while partially removing a portion of the hard mask used to etch the trenches in the field region. The partial etch equalizes the height of the hard mask in the array and field region after formation of the deep trenches by a reactive ion etch.
REFERENCES:
patent: 4939104 (1990-07-01), Pollack et al.
patent: 5380674 (1995-01-01), Kimura et al.
Flienter Bertrand
Ploessl Robert
Braden Stanton C.
Siemens Aktiengesellschaft
Tsai Jey
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