Reduction of field edge thinning in peripheral devices

Details Reduction of field edge thinning in peripheral devices Reduction of field edge thinning in peripheral devices

2007-07-10

2007-07-10

Smoot, Stephen W. (Department: 2813)

Semiconductor device manufacturing: process

Making field effect device having pair of active regions...

Having insulated gate

C438S296000, C438S424000

Reexamination Certificate

active

10180415

ABSTRACT:
A dielectric layer (e.g., an interpoly dielectric layer) is deposited over low and high voltage devices of a peripheral memory device. The dielectric behaves as an oxidation and wet oxide etch barrier. The dielectric prevents the devices from being stripped by a wet oxide etch that can result in the exposure of the silicon corners. The exposure of a silicon corner may increase thinning of a gate oxide at the field edge. This causes variability and unreliability in the device. The dielectric is not removed from a device until the device is ready for processing. That is, the dielectric remains on a device until the growing of a gate oxide on that device has begun. This reduces the exposure of the silicon corner. Hedges that result may be removed by exposing a trench in the field oxide at the hedge.

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