Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate
Patent
1997-09-30
2000-07-18
Chaudhari, Chandra
Semiconductor device manufacturing: process
Making field effect device having pair of active regions...
Having insulated gate
438530, 438910, H01L 21336
Patent
active
060906715
ABSTRACT:
Reduction of gate-induced-drain-leakage in metal oxide semiconductor (MOS) devices is achieved by performing an anneal in a non-oxidizing ambient. In one embodiment, the anneal is performed in a argon and/or ammonia ambients after gate sidewall oxidation that forms the spacers.
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Wolf et al., Silicon Processing for the VLSI Era, vol. 1 --Process Technology, pp. 56-58, 1986.
Balasubramanyam Karanam
Gall Martin
Gambino Jeffrey P.
Mandelman Jack A.
Braden Stanton C.
Chaudhari Chandra
International Business Machines - Corporation
Siemens Aktiengesellschaft
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