Reduction of gate-induced drain leakage in semiconductor devices

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate

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438530, 438910, H01L 21336

Patent

active

060906715

ABSTRACT:
Reduction of gate-induced-drain-leakage in metal oxide semiconductor (MOS) devices is achieved by performing an anneal in a non-oxidizing ambient. In one embodiment, the anneal is performed in a argon and/or ammonia ambients after gate sidewall oxidation that forms the spacers.

REFERENCES:
patent: 3876472 (1975-04-01), Polinsky
patent: 3925107 (1975-12-01), Gdula et al.
patent: 3959025 (1976-05-01), Polinsky
patent: 4151008 (1979-04-01), Kirkpatrick
patent: 4621413 (1986-11-01), Lowe et al.
patent: 5382533 (1995-01-01), Ahmad et al.
Wolf et al., Silicon Processing for the VLSI Era, vol. 1 --Process Technology, pp. 56-58, 1986.

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