Reduction of a hot carrier effect phenomena via use of transient

Details Reduction of a hot carrier effect phenomena via use of transient Reduction of a hot carrier effect phenomena via use of transient

1999-01-19

2000-09-19

Chaudhari, Chandra

Semiconductor device manufacturing: process

Making field effect device having pair of active regions...

Having insulated gate

438305, H01L 218234

Patent

active

061210919

ABSTRACT:
A process for fabricating a core device, featuring an LDD source/drain region, with a sharp dopant profile, while simultaneously fabricating an I/O device, featuring an LDD source/drain region, with a graded dopant profile, has been developed. The process features the initial creation of the core device, LDD source/drain region, via an ion implantation, and RTA procedure, resulting in an LDD region with a sharp dopant profile, needed for enhanced performance. The I/O device, LDD source/drain region, is next addressed via an ion implantation procedure, followed by the creation of insulator spacers, formed at a temperature that TED occurs, to allow a graded dopant profile to be achieved for the I/O device, source/drain region, thus reducing hot carrier reliability risks.

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