Reduction of dopant diffusion by the co-implantation of impuriti

Details Reduction of dopant diffusion by the co-implantation of impuriti Reduction of dopant diffusion by the co-implantation of impuriti

1997-05-30

1999-03-23

Booth, Richard A.

Semiconductor device manufacturing: process

Making field effect device having pair of active regions...

Having insulated gate

438585, 438918, H01L 218238

Patent

active

058858610

ABSTRACT:
Diffusion of dopants within the gate of the transistor and/or the source/drain regions can be inhibited by the ion co-implantation of impurities in addition to the ion implantation of the n-type or p-type dopants. Implanting a combination of nitrogen and carbon for p-type devices in addition to the p-type dopants and implanting a combination of nitrogen and fluorine for n-type devices in addition to the n-type dopants, significantly reduces the diffusion of the n-type and p-type dopants. The co-implantation of the additional impurities may be performed before patterning of the polysilicon layer to yield the gate conductors. The impurities may be implanted first, followed by the n-type or p-type dopants. Additional implantation of the impurities may be performed after the patterning of the polysilicon layer in order to reduce dopant diffusion in the source and drain regions. The ion implantation of the gate conductors and source/drain regions may performed at the same time following the patterning of the polysilicon layer.

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