Lithographically space-defined charge storage regions in...

Lithography-independent fabrication of small openings for...

Local ground and V.sub.CC connection in an SRAM cell

Local interconnect for integrated circuit

Local interconnect for integrated circuit

Local interconnection arrangement with reduced junction...

Local interconnection process for preventing dopant cross...

Local SONOS-type nonvolatile memory device and method of...

Local SONOS-type structure having two-piece gate and...

Local-length nitride SONOS device having self-aligned ONO...

Localized array threshold voltage implant enhance charge...

Localized array threshold voltage implant to enhance charge...

Localized biasing for silicon on insulator structures

Localized halo implant region formed using tilt...

Localized heating and cooling of substrates

Localized semiconductor substrate for multilevel for transistors

Localized spacer for a multi-gate transistor

Locally confined deep pocket process for ULSI mosfets

Locally thinned fins

Logic circuit and its fabrication method