Search
Selected: D

Dual work function gate electrodes using doped polysilicon...

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate
Reexamination Certificate

  [ 0.00 ] – not rated yet Voters 0   Comments 0

Dual work function metal gates and methods of forming

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate
Reexamination Certificate

  [ 0.00 ] – not rated yet Voters 0   Comments 0

Dual work function recessed access device and methods of...

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate
Reexamination Certificate

  [ 0.00 ] – not rated yet Voters 0   Comments 0

Dual work function semiconductor structure with borderless...

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate
Reexamination Certificate

  [ 0.00 ] – not rated yet Voters 0   Comments 0

Dual work-function single gate stack

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate
Reexamination Certificate

  [ 0.00 ] – not rated yet Voters 0   Comments 0

Dual workfunction MOSFETs with borderless diffusion contacts...

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate
Reexamination Certificate

  [ 0.00 ] – not rated yet Voters 0   Comments 0

Dual workfunction semiconductor device

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate
Reexamination Certificate

  [ 0.00 ] – not rated yet Voters 0   Comments 0

Dual-bit non-volatile memory cell and method of making the same

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate
Reexamination Certificate

  [ 0.00 ] – not rated yet Voters 0   Comments 0

Dual-counterdoped channel field effect transistor and method

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate
Reexamination Certificate

  [ 0.00 ] – not rated yet Voters 0   Comments 0

Dual-damascene bit line structures for microelectronic...

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate
Reexamination Certificate

  [ 0.00 ] – not rated yet Voters 0   Comments 0

Dual-gate CMOS semiconductor device manufacturing method

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate
Reexamination Certificate

  [ 0.00 ] – not rated yet Voters 0   Comments 0

Dual-gate device and method

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having schottky gate
Reexamination Certificate

  [ 0.00 ] – not rated yet Voters 0   Comments 0

Dual-gate device and method

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – On insulating substrate or layer
Reexamination Certificate

  [ 0.00 ] – not rated yet Voters 0   Comments 0

Dual-gate metal-oxide-semiconductor device

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate
Reexamination Certificate

  [ 0.00 ] – not rated yet Voters 0   Comments 0

Dual-gate MOSFET with channel potential engineering

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate
Patent

  [ 0.00 ] – not rated yet Voters 0   Comments 0

Dual-gate SOI transistor

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – On insulating substrate or layer
Patent

  [ 0.00 ] – not rated yet Voters 0   Comments 0

Dual-gate transistor device and method of forming a...

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate
Reexamination Certificate

  [ 0.00 ] – not rated yet Voters 0   Comments 0

Dual-hybrid liner formation without exposing silicide layer...

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate
Reexamination Certificate

  [ 0.00 ] – not rated yet Voters 0   Comments 0

Dual-hybrid liner formation without exposing silicide layer...

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate
Reexamination Certificate

  [ 0.00 ] – not rated yet Voters 0   Comments 0

Dual-metal CMOS transistors with tunable gate electrode work...

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – On insulating substrate or layer
Reexamination Certificate

  [ 0.00 ] – not rated yet Voters 0   Comments 0
  Search
All data on this website is collected from public sources. Our data reflects the most accurate information available at the time of publication.