Dual-metal CMOS transistors with tunable gate electrode work...

Details Dual-metal CMOS transistors with tunable gate electrode work... Dual-metal CMOS transistors with tunable gate electrode work...

2006-07-18

2006-07-18

Abraham, Fetsum (Department: 2826)

Semiconductor device manufacturing: process

Making field effect device having pair of active regions...

On insulating substrate or layer

C438S412000, C438S223000, C438S224000

Reexamination Certificate

active

07078278

ABSTRACT:
A dual-metal CMOS arrangement and method of making the same provides a substrate and a plurality of NMOS devices and PMOS devices formed on the substrate. Each of the plurality of NMOS devices and PMOS devices have gate electrodes. Each NMOS gate electrode includes a first silicide region on the substrate and a first metal region on the first silicide region. The first silicide region of the NMOS gate electrode consists of a first silicide having a work function that is close to the conduction band of silicon. Each of the PMOS gate electrodes includes a second silicide region on the substrate and a second metal region on the second silicide region. The second silicide region of the PMOS gate electrode consists of a second silicide having a work function that is close to the valence band of silicon.

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“Work Function Criteria”, NC State University, Raleigh, NC, Bei Chen et al, Oct. 28, 2003.

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