Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate
Patent
1999-01-15
2000-04-18
Whitehead, Jr., Carl
Semiconductor device manufacturing: process
Making field effect device having pair of active regions...
Having insulated gate
438163, 438197, 438267, 438289, 438304, 438585, H01L 21336
Patent
active
060514701
ABSTRACT:
A semiconductor device with reduced hot carrier injection and punch through is formed with a dual gate electrode comprising edge conductive portions, a central conductive portion, and dielectric sidewall spacers formed between the edge conductive portions and central conductive portion. The edge conductive portions provide high potential barriers against the active regions, thereby reducing threshold voltage roll off and leakage current.
REFERENCES:
patent: 5168072 (1992-12-01), Moslehi
patent: 5324673 (1994-06-01), Fitch et al.
patent: 5324960 (1994-06-01), Pfiester et al.
patent: 5358879 (1994-10-01), Brady et al.
patent: 5480820 (1996-01-01), Roth et al.
patent: 5498889 (1996-03-01), Hayden
patent: 5633781 (1997-05-01), Saenger et al.
patent: 5869374 (1999-02-01), Wu
An Judy X.
Yu Bin
Advanced Micro Devices , Inc.
Guerrero Maria
Jr. Carl Whitehead
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