Dual gate oxide process with increased reliability

Dual gate oxide process with reduced thermal distribution of...

Dual gate oxide process without critical resist and without...

Dual gate oxide structure in semiconductor device and method...

Dual gate oxide thickness integrated circuit and process for mak

Dual gate process using self-assembled molecular layer

Dual gate structure for imagers and method of formation

Dual hard mask layer patterning method

Dual insulating layer diode with asymmetric interface state...

Dual layer poly deposition to prevent auto-doping in mixed-mode

Dual layer polysilicon capacitor node DRAM process

Dual layer Semiconductor Devices

Dual level gate process for hot carrier control in double...

Dual mask process for semiconductor devices

Dual metal and dual dielectric integration for metal high-k...

Dual metal CMOS transistors with silicon-metal-silicon...

Dual metal gate CMOS devices and method for making the same

Dual metal gate electrode semiconductor fabrication process...

Dual metal gate finFETs with single or dual high-K gate...

Dual metal gate transistors for CMOS process