Dual gate oxide structure in semiconductor device and method...

Details Dual gate oxide structure in semiconductor device and method... Dual gate oxide structure in semiconductor device and method...

2007-07-31

2007-07-31

Wilczewski, M. (Department: 2822)

Semiconductor device manufacturing: process

Making field effect device having pair of active regions...

Having insulated gate

C438S221000, C438S196000, C438S296000

Reexamination Certificate

active

10876277

ABSTRACT:
In the method of manufacturing a dual gate oxide layer of a semiconductor device, which has first and second active regions operating at mutually different voltages on a semiconductor substrate, the first and second active regions having a device isolation layer of STI (Shallow Trench Isolation) structure; the method of manufacturing the dual gate insulation layer includes, forming the device isolation layer so that an uppermost part thereof is positioned lower than an upper surface of the first and second active regions, before forming a gate insulation layer corresponding to each of the first and second active regions. Whereby, it is be effective till a portion of trench sidewall utilized as the active region, to increase a cell current of the active region and to prevent a stringer caused by a stepped coverage between the active region and a field region and a dent caused on a boundary face between the active region and the field region.

REFERENCES:
patent: 5683945 (1997-11-01), Penner et al.
patent: 6133093 (2000-10-01), Prinz et al.
patent: 6277682 (2001-08-01), Misium
patent: 6468099 (2002-10-01), Kim
patent: 6482716 (2002-11-01), Wohlfahrt
patent: 6566207 (2003-05-01), Park
patent: 6677639 (2004-01-01), Lee et al.
patent: 6683364 (2004-01-01), Oh et al.

Affiliated with

Also associated with

Rating

Dual gate oxide structure in semiconductor device and method... does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Dual gate oxide structure in semiconductor device and method..., we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Dual gate oxide structure in semiconductor device and method... will most certainly appreciate the feedback.

Rate now

Comments { 0 }

Profile ID: LFUS-PAI-O-3787242