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Hexagonally symmetric integrated circuit cell

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate
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High and low voltage transistor manufacturing method

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate
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High aspect ratio PBL SiN barrier formation

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate
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High capacitance damascene capacitors

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate
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High capacitive-coupling ratio of stacked-gate flash memory...

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate
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High capacity stacked DRAM device and process for making a...

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate
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High charge storage density integrated circuit capacitor

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate
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High concentration indium fluorine retrograde wells

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate
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High coupling floating gate transistor

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate
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High coupling floating gate transistor

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate
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High coupling memory cell

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate
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High coupling split-gate transistor and method for its...

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate
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High density CMOS circuit with split gate oxide

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate
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High density FET with self-aligned source atop the trench

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate
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High density FET with self-aligned source atop the trench

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate
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High density flash memory

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate
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High density floating gate flash memory and fabrication...

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate
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High density integrated circuit process

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate
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High density memory with storage capacitor

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate
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High density metal gate MOS fabrication process

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate
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