High density CMOS circuit with split gate oxide

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate

Patent

Rate now

  [ 0.00 ] – not rated yet Voters 0   Comments 0

Details

438275, 257401, H01L 218238

Patent

active

058664459

ABSTRACT:
A method for making a CMOS device includes: forming a PMOS region 60 of a first conductivity type; forming an NMOS region 62 of a second conductivity type adjacent the PMOS region 60; forming an insulating layer 64 and 66 over the PMOS region 60 and the NMOS region 62 such that the insulating layer is thinner over the PMOS region than over the NMOS region; forming a common gate 48 over the insulating layer 64 and 66; forming PMOS source/drain regions 40 and 42 of the second conductivity type in the PMOS region 60 and aligned to the common gate 48; and forming NMOS source/drain regions 44 and 46 of the first conductivity type in the NMOS region 62 and aligned to the common gate 48.

REFERENCES:
patent: 4866002 (1989-09-01), Shizukuishi et al.
patent: 5315143 (1994-05-01), Tsujji
patent: 5330920 (1994-07-01), Soleimani et al.
patent: 5480828 (1996-01-01), Hsu et al.
patent: 5528056 (1996-06-01), Shimada et al.
patent: 5596218 (1997-01-01), Soleimani et al.
patent: 5672521 (1997-09-01), Barsan et al.
T. Kuroi et al., Novel NICE(Nitrogen Implantation into CMOS Gate Electrode and Source-Drain) Structure for High Reliability and High Performance 0.25 um Dual Gate CMOS, IEEE 1993, IEDM 93, pp. 325-328, Dec. 1993.
Patent abstracts of Japan, vol. 013, No. 270 (E776), 21 Jun., '89 & JP 01 061048 A (NEC Corp), 8 Mar. '89.
Patent abstracts of Japan, vol. 014, No. 108 (E-0896), 27 Feb. '90, & JP 01 309367 A (Fujitsu Ltd), 13 Dec. '89.
Patent abstracts of Japan, vol. 011, No. 217 (E-523), 14 Jul. '87 & JP 62 037959 A (Sony Corp), 18 Feb. '87.
Patent abstracts of Japan, vol. 007, No. 140 (E-182), 18 Jun. '83 & JP 58 054638 A (Mitsubishi Denki KK) 31 Mar. '83.
Patent abstracts of Japan, vol. 097, No. 008, 29 Aug. '97 & JP 09 092729 A (Mitsubishi Electric Corp) 4 Apr. '97.
High Performance 0-2 .mu.m CMOS with 25 .ANG. Gate Oxide Grown on Nitrogen Implanted Si Substrates, C. T. Liu, et al., 1996 IEEE.
Reliability of Gate Oxide Grown on Nitrogen Implanted SI Substrates, Chuan Lin, et al., appl. Phys. Lett 69 (24), 9 Dec., 1996, American Institute of Physics, ppa 3701-3702.
Effects of Residual Surface Nitrogen on the Dielectric Breakdown Characteristics of Regrown Oxides, J. Kim, et al., IEEE Electron Device Letters, vol. 14, No. 5, May 1993, ppa 265-267.
Oxynitride films formed by low energy NO+ Implantation into silicon, J. A. Diniz, et al., Appl. Phys. Lett. 69 (15), 7 Oct. 1996, American Institute of Physics, 2214-2215.

LandOfFree

Say what you really think

Search LandOfFree.com for the USA inventors and patents. Rate them and share your experience with other people.

Rating

High density CMOS circuit with split gate oxide does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with High density CMOS circuit with split gate oxide, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and High density CMOS circuit with split gate oxide will most certainly appreciate the feedback.

Rate now

     

Profile ID: LFUS-PAI-O-1116857

  Search
All data on this website is collected from public sources. Our data reflects the most accurate information available at the time of publication.