Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate
Patent
1997-06-02
1999-11-09
Booth, Richard
Semiconductor device manufacturing: process
Making field effect device having pair of active regions...
Having insulated gate
438593, H01L 218247
Patent
active
059813385
ABSTRACT:
A method of forming a line for floating gate transistors is described and which includes, providing a substrate having a plurality of discrete field oxide regions, and intervening active area regions therebetween; forming a first alternating series of floating gates over a first alternating series of active area regions; forming a second alternating series of floating gates over a second alternating series of active area regions, the second series of floating gates disposed in spaced, overlapping and partial covering relation relative to the first alternating series of floating gates; forming a layer of dielectric material over the first and second series of floating gates; and forming a control gate layer of electrically conductive material over the layer of dielectric material. The present invention further relates to a memory chip, and die having a line of floating gate transistors formed from the same method.
REFERENCES:
patent: 5147816 (1992-09-01), Gill et al.
patent: 5576233 (1996-11-01), Hutter et al.
patent: 5674768 (1997-10-01), Chang et al.
patent: 5814543 (1998-09-01), Nishimoto et al.
patent: 5879989 (1999-03-01), Lim
Booth Richard
Micro)n Technology, Inc.
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