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Parallel scan test software

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing
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Parallel signal decoding method

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital data error correction
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Parallel signature compression circuit and method for...

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing
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Parallel spectral reed-solomon encoder and decoder

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital data error correction
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Parallel system and method for cyclic redundancy checking...

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital data error correction
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Parallel test circuit for semiconductor memory device

Error detection/correction and fault detection/recovery – Pulse or data error handling – Memory testing
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Parallel test circuit of semiconductor memory device

Error detection/correction and fault detection/recovery – Pulse or data error handling – Memory testing
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Parallel test system

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing
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Parallel test system and method

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing
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Parallel testing of a multiport memory

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing
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Parallel testing of integrated circuit devices using...

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing
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Parallel turbo coder implementation

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital data error correction
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Parallel turbo trellis-coded modulation

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital data error correction
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Parallelized CRC calculation method and system

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital data error correction
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Parallelized programmable encoder/syndrome generator

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital data error correction
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Parameter setting with error correction for analog circuits

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital data error correction
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Parameterized signal conditioning

Error detection/correction and fault detection/recovery – Pulse or data error handling – Transmission facility testing
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Parametric measurement of high-speed I/O systems

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing
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Parametric testing for high pin count ASIC

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing
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Parity assignment technique for parity declustering in a...

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital data error correction
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