Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital data error correction
Reexamination Certificate
2007-02-20
2007-02-20
Chase, Shelly (Department: 2133)
Error detection/correction and fault detection/recovery
Pulse or data error handling
Digital data error correction
Reexamination Certificate
active
10667510
ABSTRACT:
A method and system for CRC calculation to an input message is provided while improving the process time and simple to implement. A linear mapping matrix corresponding to the LFSR to generate the CRC is planning, and the computation of the LFSR to the input message for the CRC generation becomes a simplified matrix multiplication. In the word-wise and doubleword-wise CRC32 cases, the input messages are padded with specific dummies before the prefix of the input message in accordance with their length types on the transmission side, or the CRC outputs derived from the received messages are compared with specific patterns in accordance with their length types on the reception side.
REFERENCES:
patent: 5103451 (1992-04-01), Fossey
patent: 5878057 (1999-03-01), Maa
patent: 6295626 (2001-09-01), Nair et al.
patent: 6560746 (2003-05-01), Mörsberger
Chang Joe
Tsai Kovsky T. J.
Chase Shelly
Macronix International Co. Ltd.
Rabin & Berdo P.C.
LandOfFree
Parallelized CRC calculation method and system does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Parallelized CRC calculation method and system, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Parallelized CRC calculation method and system will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-3892876