Parallelized CRC calculation method and system

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital data error correction

Reexamination Certificate

Rate now

  [ 0.00 ] – not rated yet Voters 0   Comments 0

Details

Reexamination Certificate

active

10667510

ABSTRACT:
A method and system for CRC calculation to an input message is provided while improving the process time and simple to implement. A linear mapping matrix corresponding to the LFSR to generate the CRC is planning, and the computation of the LFSR to the input message for the CRC generation becomes a simplified matrix multiplication. In the word-wise and doubleword-wise CRC32 cases, the input messages are padded with specific dummies before the prefix of the input message in accordance with their length types on the transmission side, or the CRC outputs derived from the received messages are compared with specific patterns in accordance with their length types on the reception side.

REFERENCES:
patent: 5103451 (1992-04-01), Fossey
patent: 5878057 (1999-03-01), Maa
patent: 6295626 (2001-09-01), Nair et al.
patent: 6560746 (2003-05-01), Mörsberger

LandOfFree

Say what you really think

Search LandOfFree.com for the USA inventors and patents. Rate them and share your experience with other people.

Rating

Parallelized CRC calculation method and system does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Parallelized CRC calculation method and system, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Parallelized CRC calculation method and system will most certainly appreciate the feedback.

Rate now

     

Profile ID: LFUS-PAI-O-3892876

  Search
All data on this website is collected from public sources. Our data reflects the most accurate information available at the time of publication.